Fixed bug where x/y where not 0 indexed

This commit is contained in:
Jens True 2018-11-25 20:47:30 +01:00
parent 7b64e027e8
commit 0621210322
2 changed files with 8 additions and 8 deletions

@ -37,7 +37,7 @@ module vgasquare(
);
// Draw one square
wire square = ((x > box_x1) & (y > box_y1) & (x < box_x2) & (y < box_y2)) ? 1 : 0; //Is box within range?
wire square = ((x >= box_x1) & (y >= box_y1) & (x <= box_x2) & (y <= box_y2)) ? 1 : 0; //Is box within range?
wire R = square ? box_color[0] : box_color[3];
wire G = square ? box_color[1] : box_color[4];
wire B = square ? box_color[2] : box_color[5];

@ -1,4 +1,4 @@
`timescale 10ns/10ns
`timescale 1ns/1ps
module vgasquare_tb;
// Make reset high
@ -6,13 +6,13 @@ module vgasquare_tb;
initial begin
$dumpfile("vgasquare_tb.vcd");
$dumpvars;//(pixel_clk, pixel_clk, O_VGA_ACTIVE,O_VGA_HS, O_VGA_VS);
#10000000 $finish;
#16800000 $finish;
end
//Make our pixel clock
reg pixel_clk = 0;
always #2 pixel_clk = !pixel_clk;
always #19.85 pixel_clk = !pixel_clk;
wire O_VGA_ACTIVE;
wire O_VGA_HS;
@ -21,10 +21,10 @@ module vgasquare_tb;
vgasquare DUT (
.PIXEL_CLK(pixel_clk), // Pixel clock: 25Mhz (or 25.125MHz) for VGA
.RST_BTN(reset), // reset button
.box_x1(10'd120),
.box_x2(10'd520),
.box_y1(9'd440),
.box_y2(9'd480),
.box_x1(10'd1),
.box_x2(10'd2),
.box_y1(9'd1),
.box_y2(9'd2),
.box_color(6'b100001), //1 bit for each color Foreground and background
.VGA_ACTIVE(O_VGA_ACTIVE),
.VGA_HS(O_VGA_HS), // horizontal sync output