From 0621210322c9d3ada8821fbb2de820f9e10ce46f Mon Sep 17 00:00:00 2001 From: Jens True Date: Sun, 25 Nov 2018 20:47:30 +0100 Subject: [PATCH] Fixed bug where x/y where not 0 indexed --- vgasquare.v | 2 +- vgasquare_tb.v | 14 +++++++------- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/vgasquare.v b/vgasquare.v index 5cec312..905beca 100644 --- a/vgasquare.v +++ b/vgasquare.v @@ -37,7 +37,7 @@ module vgasquare( ); // Draw one square - wire square = ((x > box_x1) & (y > box_y1) & (x < box_x2) & (y < box_y2)) ? 1 : 0; //Is box within range? + wire square = ((x >= box_x1) & (y >= box_y1) & (x <= box_x2) & (y <= box_y2)) ? 1 : 0; //Is box within range? wire R = square ? box_color[0] : box_color[3]; wire G = square ? box_color[1] : box_color[4]; wire B = square ? box_color[2] : box_color[5]; diff --git a/vgasquare_tb.v b/vgasquare_tb.v index d3335c3..f4ac64f 100644 --- a/vgasquare_tb.v +++ b/vgasquare_tb.v @@ -1,4 +1,4 @@ -`timescale 10ns/10ns +`timescale 1ns/1ps module vgasquare_tb; // Make reset high @@ -6,13 +6,13 @@ module vgasquare_tb; initial begin $dumpfile("vgasquare_tb.vcd"); $dumpvars;//(pixel_clk, pixel_clk, O_VGA_ACTIVE,O_VGA_HS, O_VGA_VS); - #10000000 $finish; + #16800000 $finish; end //Make our pixel clock reg pixel_clk = 0; - always #2 pixel_clk = !pixel_clk; + always #19.85 pixel_clk = !pixel_clk; wire O_VGA_ACTIVE; wire O_VGA_HS; @@ -21,10 +21,10 @@ module vgasquare_tb; vgasquare DUT ( .PIXEL_CLK(pixel_clk), // Pixel clock: 25Mhz (or 25.125MHz) for VGA .RST_BTN(reset), // reset button - .box_x1(10'd120), - .box_x2(10'd520), - .box_y1(9'd440), - .box_y2(9'd480), + .box_x1(10'd1), + .box_x2(10'd2), + .box_y1(9'd1), + .box_y2(9'd2), .box_color(6'b100001), //1 bit for each color Foreground and background .VGA_ACTIVE(O_VGA_ACTIVE), .VGA_HS(O_VGA_HS), // horizontal sync output