max7456Registers.h

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/*
 * max7456Registers.h
 *
 *  Created on: 13 oct. 2012
 *      Author: Benoit
 */

#ifndef MAX7456REGISTERS_H_
#define MAX7456REGISTERS_H_


#include <arduino.h>


typedef byte charact[54];

#define VM0_ADDRESS_WRITE 0x00
#define VM0_ADDRESS_READ 0x80

union REG_VM0
{
    unsigned char whole ;
    struct
    {
        unsigned char videoBuffer :1;

        unsigned char softwareResetBit : 1;

        unsigned char verticalSynch : 1;

        unsigned char enableOSD : 1;

        unsigned char synchSelect : 2;

        unsigned char videoSelect :1;

        unsigned char unused : 1;

    } bits;
};


#define VM1_ADDRESS_WRITE 0x01
#define VM1_ADDRESS_READ 0x81

union REG_VM1
{
    unsigned char whole;
    struct
    {

        unsigned char blinkingDutyCycle : 2;


        unsigned char blinkingTime : 2;


        unsigned char backgroundModeBrightness : 3;

        unsigned char backgroundMode : 1;
    } bits;
};

#define HOS_ADDRESS_WRITE 0x02
#define HOS_ADDRESS_READ 0x82

union REG_HOS
{
    unsigned char whole;
    struct
    {
        unsigned char horizontalPositionOffset : 6;

        unsigned char unsused : 2;

    } bits;
};


#define VOS_ADDRESS_WRITE 0x03
#define VOS_ADDRESS_READ 0x83

union REG_VOS
{
    unsigned char whole;
    struct
    {
        unsigned char verticalPositionOffset : 5;
        unsigned char unsused : 3;

    } bits;
};

#define DMM_ADDRESS_WRITE 0x04
#define DMM_ADDRESS_READ 0x84

union REG_DMM
{
    unsigned char whole;
    struct
    {
        unsigned char autoIncrementMode : 1;
        unsigned char verticalSynchClear : 1;
        unsigned char clearDisplayMemory : 1;
        unsigned char INV : 1;
        unsigned char BLK : 1;
        unsigned char LBC : 1;
        unsigned char operationModeSelection : 1;

        unsigned char unsused : 1;



    } bits;
};


#define DMAH_ADDRESS_WRITE 0x05
#define DMAH_ADDRESS_READ 0x85

union REG_DMAH
{
    unsigned char whole;
    struct
    {
        unsigned char DisplayMemoryAdressBit8 : 1;
        unsigned char byteSelectionBit : 1;
        unsigned char unsused : 6;
    } bits;
};


#define DMAL_ADDRESS_WRITE 0x06
#define DMAL_ADDRESS_READ 0x86
typedef unsigned char REG_DMAL;


#define DMDI_ADDRESS_WRITE 0x07
#define DMDI_ADDRESS_READ 0x87
typedef unsigned char REG_DMDI;

#define CMM_ADDRESS_WRITE 0x08
#define CMM_ADDRESS_READ 0x88
typedef unsigned char REG_CMM;

#define CMAH_ADDRESS_WRITE 0x09
#define CMAH_ADDRESS_READ 0x89

typedef unsigned char REG_CMAH;

#define CMAL_ADDRESS_WRITE 0x0A
#define CMAL_ADDRESS_READ 0x8A

typedef unsigned char REG_CMAL;

#define CMDI_ADDRESS_WRITE 0x0B
#define CMDI_ADDRESS_READ 0x8B

union REG_CMDI
{
    unsigned char whole;
    struct
    {

        unsigned char rightMostPixel : 2;

        unsigned char rightCenterPixel : 2;

        unsigned char leftCenterPixel : 2;

        unsigned char leftMostPixel : 2;

    } bits;
};


#define OSDM_ADDRESS_WRITE 0x0C
#define OSDM_ADDRESS_READ 0x8C

union REG_OSDM
{
    unsigned char whole;
    struct
    {
        unsigned char osdInsertionMuxSwitchingTime : 3;


        unsigned char osdRiseAndFallTime : 3;


        unsigned char unused : 2;

    } bits;
};


#define RB0_ADDRESS_WRITE 0x10
#define RB0_ADDRESS_READ 0x90

#define RB1_ADDRESS_WRITE 0x11
#define RB1_ADDRESS_READ 0x91

#define RB2_ADDRESS_WRITE 0x12
#define RB2_ADDRESS_READ 0x92

#define RB3_ADDRESS_WRITE 0x13
#define RB3_ADDRESS_READ 0x93

#define RB4_ADDRESS_WRITE 0x14
#define RB4_ADDRESS_READ 0x94

#define RB5_ADDRESS_WRITE 0x15
#define RB5_ADDRESS_READ 0x95

#define RB6_ADDRESS_WRITE 0x16
#define RB6_ADDRESS_READ 0x96

#define RB7_ADDRESS_WRITE 0x17
#define RB7_ADDRESS_READ 0x97

#define RB8_ADDRESS_WRITE 0x18
#define RB8_ADDRESS_READ 0x98

#define RB9_ADDRESS_WRITE 0x19
#define RB9_ADDRESS_READ 0x99

#define RBA_ADDRESS_WRITE 0x1A
#define RBA_ADDRESS_READ 0x9A

#define RBB_ADDRESS_WRITE 0x1B
#define RBB_ADDRESS_READ 0x9B

#define RBC_ADDRESS_WRITE 0x1C
#define RBC_ADDRESS_READ 0x9C

#define RBD_ADDRESS_WRITE 0x1D
#define RBD_ADDRESS_READ 0x9D

#define RBE_ADDRESS_WRITE 0x1E
#define RBE_ADDRESS_READ 0x9E

#define RBF_ADDRESS_WRITE 0x1F
#define RBF_ADDRESS_READ 0x9F

union REG_RBN
{
    unsigned char whole;
    struct
    {
        unsigned char characterWhiteLevel : 2;

        unsigned char characterBlackLevel : 2;

        unsigned char unused : 4;
    } bits;
};

#define OSDBL_ADDRESS_WRITE 0x6C
#define OSDBL_ADDRESS_READ 0xEC

union REG_OSDBL
{
    unsigned char whole;
    struct
    {
        unsigned char doNotChange : 4;
        unsigned char osdImageBlackLevelControl : 1;

        unsigned char unused : 3;
    } bits;
};

#define STAT_ADDRESS_READ 0xA0 //Read only

union REG_STAT
{
    unsigned char whole;
    struct
    {
        unsigned char PALDetected : 1;
        unsigned char NTSCDetected : 1;
        unsigned char LOS : 1;
        unsigned char NOTHsynchOutputLevel : 1;
        unsigned char NOTVsynchOutputLevel : 1;
        unsigned char characterMemoryStatus : 1;
        unsigned char resetMode : 1;
        unsigned char unused : 1;
    } bits;
};


#define DMDO_ADDRESS_READ 0xB0

typedef unsigned char DMDO;

#define CMDO_ADDRESS_READ 0xC0

union REG_CMDO
{
    unsigned char whole;
    struct
    {
        unsigned char rightMostPowel : 2;
        unsigned char rightCenterPixel : 2;
        unsigned char leftCenterPixel : 2;
        unsigned char leftMostPixel : 2;
    } bits;
};




#define COLOR_BLACK       0


#define COLOR_WHITE       2


#define COLOR_TRANSPARENT 1


#define COLOR_GREY COLOR_TRANSPARENT


struct PIXEL
{
    byte pix3 : 2;
    byte pix2 : 2;
    byte pix1 : 2;


    byte pix0 : 2;

};

union LINE
{
    byte whole[3];
    struct PIXEL pixels[3];
};


union CARACT
{
    charact whole;
    union LINE line[18];
};


enum{
_BT_BT=0,
_BT_2BT,
_BT_3BT,
_3BT_BT
};

enum{
_2fields=0,
_4fields,
_6fields,
_8fields
};


#endif /* MAX7456REGISTERS_H_ */