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<a href="#pub-attribs">Public Attributes</a> &#124;
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<p>Represents a Display Memory Mode value.
<a href="union_r_e_g___d_m_m.html#details">More...</a></p>
<p><code>#include &lt;<a class="el" href="max7456_registers_8h_source.html">max7456Registers.h</a>&gt;</code></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Public Attributes</h2></td></tr>
<tr class="memitem:ab3dfe39b0aa6301264c9c7c6dea1971d"><td class="memItemLeft" align="right" valign="top">unsigned char&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="union_r_e_g___d_m_m.html#ab3dfe39b0aa6301264c9c7c6dea1971d">whole</a></td></tr>
<tr class="memdesc:ab3dfe39b0aa6301264c9c7c6dea1971d"><td class="mdescLeft">&#160;</td><td class="mdescRight">The whole register value. <a href="#ab3dfe39b0aa6301264c9c7c6dea1971d"></a><br/></td></tr>
<tr class="separator:ab3dfe39b0aa6301264c9c7c6dea1971d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a539524eb1bf71e77c67d7640335b05fa"><td class="memItemLeft" >struct {</td></tr>
<tr class="memitem:a5404c62f21f3b9ca072a2eaef898adb1"><td class="memItemLeft" >&#160;&#160;&#160;unsigned char&#160;&#160;&#160;<a class="el" href="union_r_e_g___d_m_m.html#a8aa8319fb3282a9e9880c89273e93cfc">autoIncrementMode</a>: 1</td></tr>
<tr class="memdesc:a5404c62f21f3b9ca072a2eaef898adb1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto-Increment Mode. <a href="#a5404c62f21f3b9ca072a2eaef898adb1"></a><br/></td></tr>
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<tr class="memitem:a1771518b73506998d5fe1cc766ee233e"><td class="memItemLeft" >&#160;&#160;&#160;unsigned char&#160;&#160;&#160;<a class="el" href="union_r_e_g___d_m_m.html#a13791c2c4a3ef211e2cc87ecbf7cb81a">verticalSynchClear</a>: 1</td></tr>
<tr class="memdesc:a1771518b73506998d5fe1cc766ee233e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vertical Sync Clear (Valid only when clear display memory = 1, (DMM[2] = 1) ) <a href="#a1771518b73506998d5fe1cc766ee233e"></a><br/></td></tr>
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<tr class="memitem:aaa3db302a0d67532ad1ad5791acd1985"><td class="memItemLeft" >&#160;&#160;&#160;unsigned char&#160;&#160;&#160;<a class="el" href="union_r_e_g___d_m_m.html#ab1142496157dba4fcd42b7d58a7a4556">clearDisplayMemory</a>: 1</td></tr>
<tr class="memdesc:aaa3db302a0d67532ad1ad5791acd1985"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear Display Memory. <a href="#aaa3db302a0d67532ad1ad5791acd1985"></a><br/></td></tr>
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<tr class="memitem:a5402af2814dd59b5ce470539c5124f89"><td class="memItemLeft" >&#160;&#160;&#160;unsigned char&#160;&#160;&#160;<a class="el" href="union_r_e_g___d_m_m.html#a00e2cda32bb10e889e1d06f61a9f594c">INV</a>: 1</td></tr>
<tr class="memdesc:a5402af2814dd59b5ce470539c5124f89"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invert Bit (applies to characters written in 16-bit operating mode) <a href="#a5402af2814dd59b5ce470539c5124f89"></a><br/></td></tr>
<tr class="separator:a5402af2814dd59b5ce470539c5124f89"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afb25123eee8c242ecf02650dcfc6c36e"><td class="memItemLeft" >&#160;&#160;&#160;unsigned char&#160;&#160;&#160;<a class="el" href="union_r_e_g___d_m_m.html#a3ca36040525d2c8ae57e7957562c8e2f">BLK</a>: 1</td></tr>
<tr class="memdesc:afb25123eee8c242ecf02650dcfc6c36e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Blink Bit (applies to characters written in 16-bit operating mode) <a href="#afb25123eee8c242ecf02650dcfc6c36e"></a><br/></td></tr>
<tr class="separator:afb25123eee8c242ecf02650dcfc6c36e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8c2aa22ae10f3a62757758f0b03f9cce"><td class="memItemLeft" >&#160;&#160;&#160;unsigned char&#160;&#160;&#160;<a class="el" href="union_r_e_g___d_m_m.html#ae472b9df6fca1115ef2441451681d48f">LBC</a>: 1</td></tr>
<tr class="memdesc:a8c2aa22ae10f3a62757758f0b03f9cce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Local Background Control Bit (applies to characters written in 16-bit operating mode) <a href="#a8c2aa22ae10f3a62757758f0b03f9cce"></a><br/></td></tr>
<tr class="separator:a8c2aa22ae10f3a62757758f0b03f9cce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abbd8c705f276ce9de01ff60d77632c3e"><td class="memItemLeft" >&#160;&#160;&#160;unsigned char&#160;&#160;&#160;<a class="el" href="union_r_e_g___d_m_m.html#a536b370d6095cbec5b8f47d5a814754e">operationModeSelection</a>: 1</td></tr>
<tr class="memdesc:abbd8c705f276ce9de01ff60d77632c3e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Operation Mode Selection. <a href="#abbd8c705f276ce9de01ff60d77632c3e"></a><br/></td></tr>
<tr class="separator:abbd8c705f276ce9de01ff60d77632c3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a21ba187127a7284c5689e287da211987"><td class="memItemLeft" >&#160;&#160;&#160;unsigned char&#160;&#160;&#160;<a class="el" href="union_r_e_g___d_m_m.html#a4b21150140b6e30e02ff3c0e5e5459ed">unsused</a>: 1</td></tr>
<tr class="memdesc:a21ba187127a7284c5689e287da211987"><td class="mdescLeft">&#160;</td><td class="mdescRight">Don't care. <a href="#a21ba187127a7284c5689e287da211987"></a><br/></td></tr>
<tr class="separator:a21ba187127a7284c5689e287da211987"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a539524eb1bf71e77c67d7640335b05fa"><td class="memItemLeft" valign="top">}&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="union_r_e_g___d_m_m.html#a539524eb1bf71e77c67d7640335b05fa">bits</a></td></tr>
<tr class="memdesc:a539524eb1bf71e77c67d7640335b05fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">access to individual bits <a href="#a539524eb1bf71e77c67d7640335b05fa"></a><br/></td></tr>
<tr class="separator:a539524eb1bf71e77c67d7640335b05fa"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Represents a Display Memory Mode value. </p>
</div><h2 class="groupheader">Member Data Documentation</h2>
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<td class="memname">unsigned char REG_DMM::autoIncrementMode</td>
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<p>Auto-Increment Mode. </p>
<ul>
<li>0 = Disabled </li>
<li>1 = Enabled <dl class="section note"><dt>Note</dt><dd>When this bit is enabled for the first time, data in the Display Memory Address (DMAH[0] and DMAL[7:0]) registers are used as the starting location to which the data is written. When performing the auto-increment write for the display memory, the 8-bit address is internally generated, and therefore only 8-bit data is required by the SPI-compatible interface (Figure 21). The content is to be interpreted as a Character Address byte if DMAH[1] = 0 or a Character Attribute byte if DMAH[1] = 1. This mode is disabled by writing the escape character 1111 1111. If the Clear Display Memory bit is set, this bit is reset internally. </dd></dl>
</li>
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<td class="memname">REG_DMM::bits</td>
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<p>access to individual bits </p>
</div>
</div>
<a class="anchor" id="a3ca36040525d2c8ae57e7957562c8e2f"></a>
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<td class="memname">unsigned char REG_DMM::BLK</td>
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<p>Blink Bit (applies to characters written in 16-bit operating mode) </p>
<ul>
<li>0 = Blinking off </li>
<li>1 = Blinking on <dl class="section note"><dt>Note</dt><dd>Blinking rate and blinking duty cycle data in the Video Mode 1 (VM1) register are used for blinking control </dd></dl>
</li>
</ul>
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<td class="memname">unsigned char REG_DMM::clearDisplayMemory</td>
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<p>Clear Display Memory. </p>
<ul>
<li>0 = Inactive </li>
<li>1 = Clear (fill all display memories with zeros) <dl class="section note"><dt>Note</dt><dd>This bit is automatically cleared after the operation is completed (the operation requires 20us). The user does not need to write a 0 afterwards. The status of the bit can be checked by reading this register. This operation is automatically performed: a) On power-up b) Immediately following the rising edge of RESET c) Immediately following the rising edge of CS after VM0[1] has been set to 1 </dd></dl>
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<td class="memname">unsigned char REG_DMM::INV</td>
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<p>Invert Bit (applies to characters written in 16-bit operating mode) </p>
<ul>
<li>0 = Normal (white pixels display white, black pixels display black) </li>
<li>1 = Invert (white pixels display black, black pixels display white) </li>
</ul>
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<td class="memname">unsigned char REG_DMM::LBC</td>
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<p>Local Background Control Bit (applies to characters written in 16-bit operating mode) </p>
<ul>
<li>0 = sets the background pixels of the character to the video input (VIN) when in external sync mode. </li>
<li>1 = sets the background pixels of the character to the background mode brightness level defined by VM1[6:4] in external or internal sync mode. <dl class="section note"><dt>Note</dt><dd>In internal sync mode, the local background control bit behaves as if it is set to 1 </dd></dl>
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<td class="memname">unsigned char REG_DMM::operationModeSelection</td>
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<p>Operation Mode Selection. </p>
<ul>
<li>0 = 16-bit operation mode </li>
<li>1 = 8-bit operation mode </li>
</ul>
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<td class="memname">unsigned char REG_DMM::unsused</td>
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<p>Don't care. </p>
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<td class="memname">unsigned char REG_DMM::verticalSynchClear</td>
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<p>Vertical Sync Clear (Valid only when clear display memory = 1, (DMM[2] = 1) ) </p>
<ul>
<li>0 = Immediately applies the clear display-memory command, DMM[2] = 1 </li>
<li>1 = Applies the clear display-memory command, DMM[2] = 1, at the next VSYNC time </li>
</ul>
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<td class="memname">unsigned char REG_DMM::whole</td>
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<p>The whole register value. </p>
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<hr/>The documentation for this union was generated from the following file:<ul>
<li><a class="el" href="max7456_registers_8h_source.html">max7456Registers.h</a></li>
</ul>
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