`timescale 1ns/1ps
module vgasquare_tb;

  // Make reset high
  reg reset = 1;
  initial begin
     $dumpfile("vgasquare_tb.vcd");
     $dumpvars;
     #16800000 $finish;
  end


  //Make our pixel clock
  reg pixel_clk = 0;
  always #19.85 pixel_clk = !pixel_clk;
  
  wire O_VGA_ACTIVE;
  wire O_VGA_HS;
  wire O_VGA_VS;

  vgasquare DUT ( 
        .PIXEL_CLK(pixel_clk),       // Pixel clock: 25Mhz (or 25.125MHz) for VGA
        .RESET(reset),         // reset button
        .box_x1(10'd1),       
        .box_x2(10'd2),
        .box_y1(9'd1),
        .box_y2(9'd2),    
        .box_color(6'b100001),      //1 bit for each color  Foreground and background
        .VGA_HS(O_VGA_HS),       // horizontal sync output
        .VGA_VS(O_VGA_VS),       // vertical sync output
        .VGA_R(O_VGA_R),            // 1-bit VGA red output
        .VGA_G(O_VGA_G),            // 1-bit VGA green output
        .VGA_B(O_VGA_B)             // 1-bit VGA blue output
        );
endmodule // test