From 7e569c41fe39079916d61af39c3de9e9277ca03c Mon Sep 17 00:00:00 2001 From: Jens True Date: Sun, 11 Nov 2018 18:55:56 +0100 Subject: [PATCH] Added foreground and background color --- vgasquare.v | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/vgasquare.v b/vgasquare.v index 83cee2f..9c05296 100644 --- a/vgasquare.v +++ b/vgasquare.v @@ -6,13 +6,14 @@ `default_nettype none module vgasquare( - input wire CLK, // board clock: 100 MHz clock in required + input wire CLK, // board clock + input wire PIXEL_CLK, // Pixel clock: 25Mhz (or 25.125MHz) for VGA input wire RST_BTN, // reset button input wire [9:0] box_x1, input wire [9:0] box_x2, input wire [8:0] box_y1, input wire [8:0] box_y2, - input wire [2:0] box_color, //1 bit for each color + input wire [5:0] box_color, //1 bit for each color Foreground and background output wire VGA_HS_O, // horizontal sync output output wire VGA_VS_O, // vertical sync output output wire VGA_R, // 1-bit VGA red output @@ -22,18 +23,12 @@ module vgasquare( wire rst = ~RST_BTN; // reset is active low on AXI bus - // generate a 25 MHz pixel strobe - reg [15:0] cnt; - reg pix_stb; - always @(posedge CLK) - {pix_stb, cnt} <= cnt + 16'h4000; // divide by 4: (2^16)/4 = 0x4000 - wire [9:0] x; // current pixel x position: 10-bit value: 0-1023 wire [8:0] y; // current pixel y position: 9-bit value: 0-511 vga640x480 display ( .i_clk(CLK), - .i_pix_stb(pix_stb), + .i_pix_stb(PIXEL_CLK), .i_rst(rst), .o_hs(VGA_HS_O), .o_vs(VGA_VS_O), @@ -46,7 +41,7 @@ module vgasquare( assign square = ((x > box_x1) & (y > box_y1) & (x < box_x2) & (y < box_y1)) ? 1 : 0; //Is box within range? - assign VGA_R = square ? box_color[0] : 0; // Set R - assign VGA_G = square ? box_color[1] : 0 // Set G - assign VGA_B = square ? box_color[2] : 0 // Set B + assign VGA_R = square ? box_color[0] : box_color[3]; // Set R (Foreground and then background) + assign VGA_G = square ? box_color[1] : box_color[4]; // Set G + assign VGA_B = square ? box_color[2] : box_color[5]; // Set B endmodule