Cleanup of Verilog code
This commit is contained in:
2
Makefile
2
Makefile
@ -20,7 +20,7 @@ COUTPUT = vgasquare_tb.vpp #COMPILER OUTPUT
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###############################################################################
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###############################################################################
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#MAKE DIRECTIVES
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#MAKE DIRECTIVES
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check : $(TESTBENCH) $(SRC)
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check : $(TESTBENCH) $(SRC)
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$(COMPILER) -v $(SRC)
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$(COMPILER) $(SRC)
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simulate: $(COUTPUT)
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simulate: $(COUTPUT)
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$(SIMULATOR) $(SFLAGS) $(COUTPUT) $(SOUTPUT)
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$(SIMULATOR) $(SFLAGS) $(COUTPUT) $(SOUTPUT)
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@ -30,8 +30,8 @@ module vga640x480(
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localparam LINE = 800; // complete line (pixels)
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localparam LINE = 800; // complete line (pixels)
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localparam SCREEN = 524; // complete screen (lines)
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localparam SCREEN = 524; // complete screen (lines)
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reg [9:0] h_count; // line position
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reg [9:0] h_count = 0; // line position
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reg [9:0] v_count; // screen position
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reg [9:0] v_count = 0; // screen position
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// generate sync signals (active low for 640x480)
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// generate sync signals (active low for 640x480)
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assign o_hs = ~((h_count >= HS_STA) & (h_count < HS_END));
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assign o_hs = ~((h_count >= HS_STA) & (h_count < HS_END));
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@ -29,9 +29,9 @@ module vgasquare(
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vga640x480 display (
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vga640x480 display (
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.i_pix_stb(PIXEL_CLK),
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.i_pix_stb(PIXEL_CLK),
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.i_rst(rst),
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.i_rst(rst),
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.o_active(VGA_ACTIVE),
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.o_hs(VGA_HS),
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.o_hs(VGA_HS),
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.o_vs(VGA_VS),
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.o_vs(VGA_VS),
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.o_active(VGA_ACTIVE),
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.o_x(x),
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.o_x(x),
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.o_y(y)
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.o_y(y)
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);
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);
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@ -18,16 +18,19 @@ module vgasquare_tb;
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wire O_VGA_HS;
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wire O_VGA_HS;
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wire O_VGA_VS;
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wire O_VGA_VS;
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vgasquare display (
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vgasquare DUT (
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.PIXEL_CLK(pixel_clk), // Pixel clock: 25Mhz (or 25.125MHz) for VGA
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.PIXEL_CLK(pixel_clk), // Pixel clock: 25Mhz (or 25.125MHz) for VGA
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.RST_BTN(reset), // reset button
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.RST_BTN(reset), // reset button
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.box_x1(10'd120),
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.box_x1(10'd120),
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.box_x2(10'd520),
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.box_x2(10'd520),
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.box_y1(9'd120),
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.box_y1(9'd440),
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.box_y2(9'd360),
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.box_y2(9'd480),
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.box_color(6'b111000), //1 bit for each color Foreground and background
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.box_color(6'b100001), //1 bit for each color Foreground and background
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.VGA_ACTIVE(O_VGA_ACTIVE),
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.VGA_ACTIVE(O_VGA_ACTIVE),
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.VGA_HS(O_VGA_HS), // horizontal sync output
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.VGA_HS(O_VGA_HS), // horizontal sync output
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.VGA_VS(O_VGA_VS) // vertical sync output
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.VGA_VS(O_VGA_VS), // vertical sync output
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.VGA_R(O_VGA_R), // 1-bit VGA red output
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.VGA_G(O_VGA_G), // 1-bit VGA green output
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.VGA_B(O_VGA_B) // 1-bit VGA blue output
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);
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);
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endmodule // test
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endmodule // test
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